Hello Matt, I happened to notice an error in your schematic. Specifically U17, the second decoder in the 74139 being used to do the chip-select read and chip-select write on the VDP... Your decoding of A and B to Y1 and Y2 is backwards. If you consult the truth table, \A -> \Y2, and \B -> \Y1. So you either need to reverse your schematic wiring of \WR and \RD at the inputs, or otherwise reverse \CSW and \CSR at the outputs. Either or. Otherwise the VDP obviously won't work at all.
Regards,
Mark
Hello Matt, I happened to notice an error in your schematic. Specifically U17, the second decoder in the 74139 being used to do the chip-select read and chip-select write on the VDP... Your decoding of A and B to Y1 and Y2 is backwards. If you consult the truth table, \A -> \Y2, and \B -> \Y1. So you either need to reverse your schematic wiring of \WR and \RD at the inputs, or otherwise reverse \CSW and \CSR at the outputs. Either or. Otherwise the VDP obviously won't work at all.
Regards,
Mark