Skip to content

Latest commit

 

History

22 Commits

Folders and files

NameName
Last commit message
Last commit date
 
 
 
 

Repository files navigation

Hi, I'm Mayank Patibandla 👋

Computer Engineering student at Purdue University (Honors) and incoming M.S. ECE student. I build computer architectures, digital hardware, embedded systems, and low-level tooling.

Currently

  • Designing vector execution hardware for the Atalla AI Hardware Accelerator
  • Contributing to PROS as a former lead maintainer
  • Working at Argonne National Laboratory and teaching Computer Architecture at Purdue

Highlights

  • Built a dual-core, five-stage RV32I processor with MSI cache coherence and 80 MHz FPGA execution
  • Designed a BF16 exponential unit with one-cycle latency, initiation interval 1, and exhaustive verification
  • Implemented a USB 1.1/AHB digital controller in SystemVerilog
  • Earned the 2026 VEX Robotics World Championship Excellence Award

Tools: C, C++, Python, SystemVerilog, RISC-V Assembly, Genus, Innovus, QuestaSim, Vivado, GDB, Ghidra, Linux

Links: Website · LinkedIn

GitHub activity

Mayank's GitHub stats

Top languages

About

Computer Engineering Student at Purdue University. Member of Purdue ACM SIGBots.

Resources

Stars

1 star

Watchers

1 watching

Forks

Releases

Packages

Used by

Contributors