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Speed up native Bolt packed projections and IQ2 experts - #34002

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Rui Ren (rui-ren) wants to merge 9 commits into
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rui-ren/bolt-packed-latency-on-33994-20261109

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Scope and dependency

Extend native merge stack #33967 above #33994. This is not the alternative
operator-consolidation PR #33940, and does not replace the existing stack.
The existing five PRs and their source heads are unchanged.

Parent: #33994 at a8ff5642f5c85519561964928006413a4fde7859.
Candidate: 1b5063c4af651e12bf955bc978c9312e2734a9f9.

Bring the nine previously isolated native optimization commits onto the actual
merge-stack tip, with six changed files. Preserve MatMulPacked, MoEPacked,
their packed-weight layouts and precision options, Mamba2Verify, and the
standalone/integrated router introduced by #33994. No graph conversion,
requantization, schema addition, GenAI inference change, or acceptance tuning.

Kernel changes

  • NVFP4: vectorized group decoding, paired BF16 operand construction and
    half-chunk staging for eligible large-N Hopper projections, with supported
    offset/stride fallbacks retained.
  • Q8: aligned packed-record windows while retaining scale precision and the
    fallback for unsupported alignment.
  • Dense IQ2: reconstruct complete BF16 operands without changing the existing
    contiguous K partitions and cancellation/reduction order.
  • IQ2 experts: exact magnitude-codebook reconstruction and launch-selected
    aligned FC1 activation loads. Preserve FP32 scale reconstruction, sign before
    BF16 rounding, FC1/FC2 warp partitions, squared-ReLU boundaries and FC2 loading.
  • Use [CUDA] Extract Bolt projected-sigmoid routing into MoERouterPacked #33994's shared LoadPacked8 fallback after its router extraction rather
    than restoring the removed private router helper.

All nine commits retain provenance, signoffs and coauthor trailers. They were
ported without merging or rewriting the existing stack.

Actual-stack H100 throughput

This is the actual stack-tip comparison, not the earlier private-branch
versus #33940 comparison. That distinction matters: the remote stack tip did
not yet contain the optimized native kernels.

Input tokens Stack ordinary tok/s Candidate ordinary tok/s Stack k=7 tok/s Candidate k=7 tok/s
178-254 54.36 92.42 223.84 355.42
427-932 54.20 92.08 185.24 293.62
1028-1663 54.25 92.04 201.48 318.91

Approximately 70% ordinary and 58-59% k=7 improvement in this controlled
comparison. This does not claim that all remaining latency is resolved.
The separate #33940 equivalent-package result of approximately 109 ordinary /
370 k=7 tok/s on the longest bin is not a measurement of this candidate;
transferring that remaining gain is still outstanding.

Protocol: original frozen 30 real prompts, ten per bin, unchanged warmups and
per-prompt mode order, natural EOS/512-new-token cap, two reversed-order passes,
same physical H100 per baseline/candidate shard. Eight logical shards ran in
waves over GPUs 1,3,4,5,6,7. All admitted runs passed the foreign-client and
resource guards. No profiler ran in the timing window; clocks were not locked.
Rates pool decoded tokens over elapsed decode time, excluding the first token,
not arithmetic means of per-request TPS.

Correctness and build validation

  • Exact same native model package, packed bytes and GenAI libraries in both arms.
    Graph hashes match the preserved source-value audit; full package-file hashes
    were recorded again. No exported checkpoint/package was modified.
  • 22 native CUDA regressions passed, zero skips, covering projections,
    complete operand rounding/cancellation, IQ2 production widths/codebook scales,
    routing and the standalone router. Changed C++ files passed CLANGFORMAT;
    git whitespace checks passed.
  • 1,782 complete live tensor/state hashes per arm, bitwise equal and finite
    in ordinary and k=7 modes, also equal to the preserved quantized control.
  • Independent full LCB145 ordinary/k=7 probes passed all 512 generated tokens
    and complete counters.
  • The accepted timing run passed 240 complete measured generation sequences
    against frozen ordinary-control tokens. Within-mode complete speculative
    counter dictionaries matched between arms and repeats.
  • Isolated incremental rebuild on the archived clean [CUDA] Extract Bolt projected-sigmoid routing into MoERouterPacked #33994 build; every
    affected compilation unit/header dependent was rebuilt and the provider/test
    binary relinked with the production flags. Untouched objects were reused:
    this is not a new clean full-source build.
  • CUDA 12.8.93, driver 580.159.04, H100 80GB. Common corrected GenAI source:
    c0fd01914265d5157d6da1376c38b4df521a76c5
    (microsoft/onnxruntime-genai#2916).
    Both arms use that same source; its correctness fix is not credited with the
    kernel speedup.

Accepted statistics SHA256:
0b9b7e2385b2dd9d7e5f7d459c65ef74338b5f707d1536454e7e27fb9a407c0f.

Remaining qualification

Keep draft. No independent HF/benchmark-suite accuracy rerun, longer-context
qualification, other-GPU-architecture qualification, full-CI-green or merge-ready
claim. This validates the pinned #33994 lineage plus this patch, not an
unmeasured rebase onto the subsequently advanced lower #33953 head.
The original packages, earlier evidence, other PRs and native stack membership
are preserved; only this new follow-up is intended for append.

Rui Ren (rui-ren) and others added 9 commits November 9, 2026 06:03
…metic

Decode a full sixteen-value NVFP4 group with one shared FP8 scale conversion and two alignment-safe word loads instead of two scalar eight-value decoder calls. Preserve FP32 reconstruction, the complete-operand BF16 cast, MMA operand order, contiguous K partitions and warp reductions. Add independent exact-value production-shape coverage for signed scales, sentinel zero, tails and M1/M7/M8 with initializer and dynamic weights.

Validation: five MatMulPackedPrecisionTest native cases passed without skips through the rebuilt production provider; 524288 exhaustive operand words and complete projection tensors matched bitwise, including offset bindings, padded rows, canaries and M1/M8 row identity. Same-GPU frozen 2048-prompt/512-token ordinary and k7 replays retained all token IDs and workload counters. Large/small CUDA kernels improved from 134.23/56.39 us to 64.49/25.69 us; clang-format and git diff --check passed.

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Signed-off-by: rui-ren <ruiren1225@gmail.com>
(cherry picked from commit dbbd73c)
Signed-off-by: rui-ren <ruiren1225@gmail.com>
Replace intermediate FP32 operand arrays with byte-permutation BF16 pair packing on SM90+. Qualify word loads only when both weight base and row stride are aligned; retain safe unaligned decoding and the established pre-SM90 fallback. Preserve scale-byte127 zero handling, exact scale/cast operands restored before MMA, activation-dtype dequantization, and unchanged MMA/reduction order. No allocation, initializer PrePack, or dense weight expansion.

Validated the immutable incremental production rebuild: 12 projection/MoE native cases without skips; 524,288 exhaustive operand words and complete-output bitwise equality; M1/M7/M8, offsets, padded rows, tails, signed/extreme scales, sentinel/NaN, and canaries. Same-GPU repeated/reverse-order 2048-prompt fixed-R8 512-output runtime probes preserve tokens/counters with CUDA graphs and zero CUPTI loss. Large projection improves 64.60 to 43.86us, ordinary 69.98 to 75.60 tok/s and k7 417.75 to 442.20. Clang-format and git diff --check pass. Historical 25.45us recovery and production raw-layout PrePack are not claimed.

Signed-off-by: rui-ren <ruiren1225@gmail.com>
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Signed-off-by: rui-ren <ruiren1225@gmail.com>
(cherry picked from commit 7e6379a)
Signed-off-by: rui-ren <ruiren1225@gmail.com>
Construct BF16 MMA operand pairs directly from GGML IQ2 records while preserving complete FP32 scale/grid reconstruction and the existing reduction and activation boundaries. Controlled load-form ablations select byte code loads for FC1 and record-word loads for FC2. Add production-width and malformed-route native coverage.

Validation: 7 native tests passed with no skips; complete 17.7M-value bitwise fragment comparisons, full intermediate/final arrays, cohort/offset/canary checks, CUDA memcheck, and clang-format passed. Paired actual-provider replay improved ordinary 54.58 to 57.09 tok/s (+4.59%) and k7 344.82 to 363.82 (+5.51%), with identical full sequences and counters. This is not lossless-k7 release acceptance.

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Signed-off-by: rui-ren <ruiren1225@gmail.com>
(cherry picked from commit efdd0c9)
Signed-off-by: rui-ren <ruiren1225@gmail.com>
Build an aligned BF16 magnitude codebook from canonical IQ2 byte codes. Every unsigned-byte magnitude is represented exactly; keep full FP32 block-scale/sign reconstruction before the original BF16 operand rounding. Preserve MMA/chunk/reduction order, routing, activation and initialized outputs. Add a positive all-codebook native sweep against the independent canonical CPU table.

Validation: complete bitwise arrays and 17,694,720 fragment values (bindings 0/2, special scales, tails/cohorts and malformed routes); eight native tests, zero skips, and CUDA memcheck with zero errors. Strict C++ formatting/compiler checks pass. Verified actual incremental CUDA provider and complete 512-token sequences/counters in ordinary and k7, CUDA graphs active and no CUPTI losses. Same-GPU v1-v2-v1 bracket improves ordinary 57.124->58.536 tok/s (+2.47%) and k7 363.612->375.139 (+3.17%). No historical-recovery or lossless-release acceptance claimed.

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Signed-off-by: rui-ren <ruiren1225@gmail.com>
(cherry picked from commit f9f4013)
Signed-off-by: rui-ren <ruiren1225@gmail.com>
Load packed codes, scale bytes and activation words one 16-K half ahead only for the aligned SM90+ KW4/MT2/128-K specialization. Preserve BF16 reconstruction, per-warp MMA order, contiguous K partitions, warp reduction and global-scale-before-cast arithmetic. Retain small-N and unsupported-binding paths after controlled chunk-staging regressions.

Extend the native production-shape fixture with R3 and N-threshold/uneven-K cases. Same-TU production-flag standalone trials show approximately 5% lower R8 N18560/K4096 latency with complete bitwise outputs and exhaustive operand-word equality. The complete production translation unit compiles; native provider and E2E integration remain separate pending qualification gates.

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Signed-off-by: rui-ren <ruiren1225@gmail.com>
(cherry picked from commit 23a6934)
Signed-off-by: rui-ren <ruiren1225@gmail.com>
Specialize only aligned Q8 contiguous tensor-core projections to read raw 16-byte windows and reassemble the existing 34-byte GGUF records. Retain the existing decoder for offset or stride bindings that do not qualify. Keep FP16 scale reconstruction, BF16 operand rounding, MMA ordering, K partition and epilogue unchanged.

Add focused signed-scale record-window and stride-fallback regression cases. Standalone complete-output comparisons, exhaustive finite-FP16 operand checks, CUDA memcheck and production translation-unit compilation pass; actual provider integration remains a separate qualification gate.

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Signed-off-by: rui-ren <ruiren1225@gmail.com>
(cherry picked from commit 8f03dab)
Signed-off-by: rui-ren <ruiren1225@gmail.com>
Encode the exact IQ2 magnitude codebook as adjacent BF16 pairs, eliminating byte-to-float magnitude conversions while retaining FP16 scale payloads and complete signed FP32 reconstruction before the single BF16 cast. Preserve existing chunk64 partitions, adjacent-pair MMA ordering, reductions, and epilogues; leave other quantization paths unchanged.

Add independent production-width regression cases with heterogeneous non-power-of-two scales. Qualify full operands and outputs with paired rotating and warm standalone cohorts, compile the production and native-test translation units, and run zero-error full memcheck validation. Actual provider and end-to-end qualification remain separate.

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Signed-off-by: rui-ren <ruiren1225@gmail.com>
(cherry picked from commit 20d0faa)
Signed-off-by: rui-ren <ruiren1225@gmail.com>
MatMulPacked accepts the optional global_scale input only for NVFP4. Remove that unsupported input from the new Q8 and IQ2 regression graphs and compare the default unit epilogue instead. Keep their signed non-power-of-two FP16 block scales and complete BF16 operand reconstruction coverage unchanged. The native failures were input-validation errors before kernel execution; no production kernel or API changes are made.

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Signed-off-by: rui-ren <ruiren1225@gmail.com>
(cherry picked from commit a0c7e00)
Signed-off-by: rui-ren <ruiren1225@gmail.com>
Select aligned activation loads once at launch while retaining the supported offset fallback. Apply IQ2 signs to the complete FP32 product before BF16 conversion without changing scale precision, MMA/K partitions, reductions or squared-ReLU boundaries.

Keep expert-down reconstruction and loading unchanged: applying the same isolated alternatives there regresses distinct-route workloads. Same-TU H100 validation covers complete operands, pipeline intermediates, routing metadata, canaries, offsets and production widths with bitwise identity.

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Signed-off-by: rui-ren <ruiren1225@gmail.com>
(cherry picked from commit 391f94e)
Signed-off-by: rui-ren <ruiren1225@gmail.com>

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