openrknn: byte-exact l0_mlp — complete exNorm DMA routing - #89
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Achieve byte-exact DMA address match with vendor oracle for SmolVLM l0_mlp: 0 non-DMA diffs, 0 DMA-class diffs across 613 regcmd sections. Key fixes: - exNorm trailing REFORMAT SRC/DST: use scratch tensor (input[3]) for intermediate tasks, real output for final task - exNorm trailing REFORMAT BS/BN: remove gamma/beta for intermediate tasks, keep for final (detected via next-task op_idx lookahead) - Post-em0d CONV SRC/EW (block_idx>1): use scratch + CNA-derived tile offset; first CONV (block_idx=1) still reads from data tensor - Post-CONV REFORMAT SRC: use dst_tensor_off (CONV output) when preceding task was em=0x1d of the same op (unified_act mode only) DMA diff history: 72 → 52 → 48 → 3 → 1 → 0 CI: 9/9 pass, 5/5 CNN byte-exact pending verification. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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Summary
Achieve byte-exact DMA address match with vendor oracle for SmolVLM l0_mlp: 0 non-DMA diffs, 0 DMA-class diffs across 613 unique regcmd sections. This is the first FP16 transformer model to reach byte-exact parity with the vendor runtime.
Changes (on top of PR #88)
DMA diff progression
Results
smolvlm_l0_mlp: BYTE-EXACT with vendor oraclesmolvlm_l0_attn_fused: still on allowlist (needs same fixes applied)Test plan
🤖 Generated with Claude Code